With advancements in electronics technology, the need for faster processing and data storage has increased. As the scaling of metal-oxide-semiconductor field-effect transistor (MOSFET) technology has progressed, the industry has faced various challenges, including increased short-circuit effects, reduced gate control, exponential leakage current, and power dissipation. Field-effect transistors made from carbon nanotubes are a suitable replacement for MOSFETs. 4-to-2 compressors are among the most popular bit compression cells that are widely used in multiplication or multi-operand addition. Their most important function is to increase the performance and efficiency of multiplication compression calculations. After examining twelve different 4-to-2 compressor designs from various research papers, this article presents a novel 4-to-2 compressor architecture utilizing modified logical relationships and carbon nanotube technology. The proposed 4-to-2 compressor and other designs from the literature have been implemented using the HSPICE simulation software. The proposed design and the previous compressors have been compared in terms of power consumption, delay, transistor count, and accuracy. Simulation results demonstrate that the new compressor architecture achieves a 25% reduction in power consumption, an 18% decrease in delay, and a 12% reduction in transistor count compared to the best previous compressor.